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Advance Digital Design

Reference Books

Stephen Brown, and Zvonko Vranesic
"Fundamentals of Digital Logic with Verilog Design"
3rd Edition, McGrawHill, 2014

"Field-Programmable Gate Arrays Explained"
Digilent 2024 (Link)

Course Goals

“Students will learn to think like FPGA designers by transforming hardware descriptions into efficient digital architectures and understanding how synthesis maps Verilog into physical hardware.“

  • Explain how Boolean functions are decomposed into FPGA LUTs using Shannon expansion.
  • Predict the hardware generated from Verilog before synthesis.
  • Distinguish behavioral, RTL, and structural descriptions.
  • Design efficient combinational and sequential circuits.
  • Infer registers, memories, and DSP blocks intentionally.
  • Compare arithmetic architectures by area, latency, and frequency.

Software

  • Quartus Prime Lite Edition (Link) 25.1 or newer

Course Modules

  • How does the FPGA map logic into LUTs? (Shannon Expansion & Technology Mapping)
  • How does Verilog become hardware? (Behavioral vs RTL vs Structural)
  • What circuit does an always_comb create? (Combinational Synthesis)
  • How does memory appear from code? (Flip-Flops, Latches, BRAM inference)
  • What circuit does an always_ff create? (Sequential logic & registers)
  • How do arithmetic operators become hardware? (Adders, Subtractors, Comparators)
  • Are all adders the same? (Ripple, Carry-Lookahead, Prefix Structures)
  • How are multiplication and division implemented? (DSPs, Shift-Add, Restoring Division)